o1310 sy 20100929-s00008 no.a1850-1/8 specifications of any and all sanyo semiconductor co.,l td. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer ' s products or equipment. to verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer ' sproductsor equipment. any and all sanyo semiconductor co.,ltd. products described or contained herein are, with regard to "standard application", intended for the use as general el ectronics equipment (home appliances, av equipment, communication device, office equipment, industrial equ ipment etc.). the products mentioned herein shall not be intended for use for any "special application" (medica l equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, t ransportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of re liability and can directly threaten human lives in case of failure or malfunction of the product or may cause har m to human bodies, nor shall they grant any guarantee thereof. if you should intend to use our products for app lications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. if there is n o consultation or inquiry before the intended use, our customer shall be solely responsible for the use. LV8063TT overview the LV8063TT is the driver ic with btl linear output for single-phase fan motor, and that drives at high efficiency, low power, and low noise by suppressing the reactive power. the btl output can be combined with the pwm control by an external signal, which is optimum for the note pc, the cpu cooler, etc. that requires low power dissipation and low noise. functions ? single-phase full-wave operating by btl output (btl amplifier gain : +43db) ? speed control available by pwm pin ? hall bias output pin (vhb = 1.05v typ) ? built-in quick start circuit ? fg(rotation signal) output pin (open drain output) ? built-in thermal-shutdown (tsd) circuit ? built-in lock protection and automatic return circuit specifications absolute maximum ratings at ta = 25 c parameter symbol conditions ratings unit maximum supply voltage v cc max 7 v i out max1 in regular mode 0.7 a out pin output current i out max2 in lock-detection mode 1 a out pin output voltage handling v out max 7 v fg output voltage handling v fg max 7 v fg output current i fg max 5 ma hb output current i hb max 10 ma pd max1 independent ic 0.2 w allowable power dissipation pd max2 ic on board * 0.4 w operating temperature topr -30 to +95 c storage temperature tstg -55 to +150 c * specified substrate : 20mm 10mm 0.8mm, paper phenol bi-cmos ic fan motor driver single-phase full-wave driver orderin g numbe r : ena1850
LV8063TT no.a1850-2/8 recommended operating conditions at ta = 25 c parameter symbol conditions ratings unit v cc opg active at all circuit 2.5 to 6.0 v supply voltage v cc min start-up with pwm=h 2.2 to 6.0 v hall input common-mode input voltage range vicm 0.3 to v cc -1.5 v electrical characteristics at ta = 25c, v cc = 5v ratings parameter symbol conditions min typ max unit i cc active 1.5 3.0 ma circuit current i cco stand-by 200 300 a hb bias voltage vhb ihb = 5ma 0.9 1.05 1.2 v hall input bias current ihin 1 a output on voltage v o i o = 250ma, source + sink 0.25 0.35 v hall amplifier output offset voltage v in ofs -6 6 mv hall amplifier voltage gain gh 39 43 47 db pwm pin input low level vpwml 0 0.7 v pwm pin input high level vpwmh 2.5 v cc v pwm input frequency fpwm design guarantee * 20 50 khz pwm input smallest pulse width tpwm design guarantee * 5 s fg output low-level voltag v fg i fg = 3ma 0.3 v fg output leakage current i fgl v fg = 7v 10 a fg comparator hysteresis width v hys 5 15 20 mv output on time in lock-detection tact 0.45 0.6 0.75 sec output off time in lock-det ection tdet 4.5 6 7.5 sec output on/off ratio in lock-detection trto trto=tdet/tact 8 10 11 thermal shutdown operating temperature tsd design guarantee * 180 c thermal shutdown hysteresis width tsd design guarantee * 40 c * design guarantee: indicates a design target value. these parameters are not tested in the independent ic. pin assignment 1 in1 2 3 4 5 10 pwm 9 hb fg 8 in2 v cc 7 sgnd out2 6 out1 pgnd top view
LV8063TT no.a1850-3/8 package dimensions unit : mm (typ) 3297 block diagram sanyo : msop10(150mil) 0.5 0.125 3.0 3.0 4.9 (0.85) 0.08 1.1 max 0.5 (0.5) 1 5 6 10 0.2 pd max -- ta 0 0.3 0.4 0.2 0.1 0.5 --30 --10 70 90 50 10 30 110 0.18 0.09 ambient temperature , ta -- c ambient temperature , pd max -- w specified board (20 10 0.8mm 3 , paper phenol) independent ic 1 in1 2 hb 3 in2 4 sgnd 5 pgnd 10 9 8 7 6 out1 pwm fg v cc out2 + - + - tsd enable control lock detection hb osc level shift
LV8063TT no.a1850-4/8 sample application circuit *1 when the diode di is used to prevent device destruction from reverse connection, the capacitor cr must be inserted to assure a path for regenerative currents. similarly, if there no nearby capacitors on the fan power supply line, the capacitor cr is also required to increase reliability. *2 the hall element is biased at a constant voltage of approximately 1.05vfrom the hb pin. thus LV8063TT provides a stable hall output w ith excellent temperature characteristics. if the hall output is needed to adjust the amplitude, use the resistor r1 as shown in the figure. *3 when the wiring from the hall output to ic hall input is long, noise may be carried through the wiring. in this case, insert the capacitor as shown in the figure. *4 this pin must be left open if unused. *5 when a pwm signal seems to be the open collector (a drain) output, please connect suitable pulling up resistance so that a h/l level is decided. 1 2 3 4 5 10 pwm 9 hb fg 8 in2 v cc 7 sgnd out2 6 out1 pgnd in1 m h r1 *3 *2 *5 *4 cr di *1
LV8063TT no.a1850-5/8 pin description pin no. pin name pin voltage description equivalent circuit 1 in1 hall input pin (+) 3 in2 - hall input pin (-) 1 3 2 hb 1.05v (typ) hall bias output pin 2 4 sgnd 0v signal ground pin 5 out1 7 out2 - motor drive output pin 5 7 6 pgnd 0v power ground pin 8 v cc 2.5v to 6.0v voltage supply pin 9 fg - fg pulse output pin 9 10 pwm - pwm control input pin 10
LV8063TT no.a1850-6/8 timing chart stand-by/start-up *t slp =800 s(typ) *when pwm signal is input ?l? level for continuousness tslp, it becones the stand-by mode by detecting above situation. *when ?h? level is input, it becomes the active mode at once. in regular-rotation *truth table when steady rotation in1 in2 *pwm out1 out2 fg mode h h l drive h l l l l l regeneration h l h drive l h l l l off regeneration v cc pwm hb out1/out2 t slp t slp (hi-impedance) active active active stand-by stand-by hys in1-in2 out1 out2 fg hys pwm
LV8063TT no.a1850-7/8 in motor-lock * when motor protection is activated, both out1 and out2 output low level. when the circuit operates making amends starting (pwm pin = h) when the power supply is turned on, th e standby release (quick st art), and the lock protecti on is released, the start amends operation is done. v cc in1-in2 pwm out1 out2 fg out1 in1-in2 tact ( = 0.6s (typ)) tact ( = 6s (typ)) out2 fg motor lock motor re-rotation waiting for fg pulse motor protection release fg detection
LV8063TT ps no.a1850-8/8 sanyo semiconductor co.,ltd. assumes no responsib ility for equipment failures that result from using products at values that exceed, even momentarily, rate d values (such as maximum ra tings, operating condition ranges, or other parameters) listed in products specif ications of any and all sanyo semiconductor co.,ltd. products described or contained herein. sanyo semiconductor co.,ltd. strives to supply high-qual ity high-reliability products, however, any and all semiconductor products fail or malfunction with some probabi lity. it is possible that these probabilistic failures or malfunction could give rise to acci dents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause dam age to other property. when designing equipment, adopt safety measures so that these kinds of accidents or e vents cannot occur. such measures include but are not limited to protective circuits and error prevention c ircuits for safe design, redundant design, and structural design. upon using the technical information or products descri bed herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of sanyo semiconductor co.,ltd. or any third party. sanyo semiconductor co.,ltd. shall not be liable f or any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. information (including circuit diagr ams and circuit parameters) herein is for example only; it is not guaranteed for volume production. any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. when designing equi pment, refer to the "delivery specification" for the sanyo semiconductor co.,ltd. product that you intend to use. in the event that any or all sanyo semiconductor c o.,ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities conc erned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any in formation storage or retrieval system, or otherwise, without the prior written consent of sanyo semiconductor co.,ltd. when the circuit operates making amends starting (pwm pin = pwm signal input) when the power supply is turned on, th e standby release (quick st art), and the lock protecti on is released, the start amends operation is done. this catalog provides information as of october, 2010. specifications and information herein are subject to change without notice. v cc in1-in2 pwm out1 out2 fg
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